Referring to FIGS. 1(a-b), diagrams are shown illustrating ac-coupled (FIG. 1a) and dc-coupled (FIG. 1b) signals. Most analog circuitry deals with signals that are ac-coupled or have symmetric swing with respect to zero as shown in FIG. 1a. Since the ac-coupled signals have symmetric swing with respect to zero, it is efficient to design an analog-to-digital converter (ADC) to have an input range of [−FS/2, FS/2], where −FS/2 and FS/2 correspond to the lowest and the highest codes, respectively.
However, in some systems, different signals are used. For example, the wobble signal in a Digital Versatile Disc Recordable (DVD-R) chip is a dc-coupled, positive only signal. The wobble signal does not have a symmetric swing with respect to zero (as illustrated by the signal in FIG. 1b). In order to avoid saturating the ADC output, only half of the full scale (FS) of the ADC can be used to digitize the signals (i.e., the input signal swing has to be limited to a range of [0, FS/2]). Because the range of the input signal is limited to half of the full scale of the ADC, 6 dB SNR (signal-to-noise-ratio) of the ADC output will be lost. The loss of 6 dB SNR means the ADC can only achieve (Ndesign−1) bits of the effective number of bits (ENOB) even if an ideal ADC is used.
A technique that optimizes signal-to-noise-ratio (SNR) performance in pipeline analog-to-digital converters (ADCs) with respect to input signal to regain the 6 dB SNR would be desirable.